Built-in circuit firm Montage Know-how has launched its CXL 3.1 Reminiscence eXpander Controller (MXC), which is presently being examined by a few of its key clients, together with AMD and Intel. The controller is compliant with the CXL 3.1 Kind 3 specification – the newest model of the CXL interconnect customary – and helps CXL.mem and CXL.io protocols. Montage Know-how says it delivers low-latency reminiscence growth, high-bandwidth efficiency, and polling appropriate for next-gen knowledge centre servers.
The CXL 3.1 MXC is constructed on a PCIe 6.2 bodily layer interface and might obtain knowledge switch charges of 64 GT/s (x8). It gives versatile configuration with multi-width and multi-rate help, permitting it to be cut up by way of two x4 ports. It measures 25 mm x 25 mm, and helps EDSFF (E3.S) and PCIe add-in card (AIC) type elements widespread in high-performance computing environments; servers, all-flash arrays, and edge computing platforms. The chip has a dual-channel DDR5 reminiscence controller that may function at speeds of as much as 8000 MT/s (million transfers per second).
The controller consists of twin RISC-V microprocessors appearing as an Utility Processing Unit (APU) and Safety Processing Unit (SPU) to help system administration. The system can regulate DDR and CXL reminiscence sources on the fly, handle safety in-hardware, and reply to system occasions in real-time.
A number of communication interfaces are additionally featured, together with SMBus/I3C – for sensor and management knowledge, SPI – for high-speed communication with different chips, and JTAG – used to check and debug {hardware}. The chip can carry out firmware updates with out advanced processes.
Raghu Nambiar, Company Vice President, Knowledge Middle Ecosystems and Options at AMD, stated, “CXL Reminiscence growth and tiering is a foundational know-how for the way forward for knowledge centre computing, particularly in enabling heterogeneous reminiscence architectures.”
Intel’s Ronak Singhal stated the CXL 3.1 MXC is a “significant step towards scalable reminiscence architectures and an expanded CXL ecosystem.”
With the demand for cloud useful resource pooling rising, customary reminiscence architectures can expertise scalability and bandwidth bottlenecks. With CXL reminiscence pooling, Montage Know-how goals to assist clients use reminiscence extra successfully.
Stephen Tai, President at Montage Know-how, stated the CXL 3.1 MXC “accelerates the business’s adoption of disaggregated reminiscence architectures by means of standards-based options, [as a] basis for reminiscence pooling and sharing in next-generation computing infrastructure.”
(Picture supply: “chip” by osde8info is licensed underneath CC BY-SA 2.0.)
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