Latest integration of 3D reminiscence applied sciences akin to high-bandwidth reminiscence [HBM] into AI accelerators has enhanced neural community efficiency. Nevertheless, the stacked buildings of 3D recollections lead to notable warmth accumulation as a result of lateral interfaces hinder vertical warmth dissipation, thereby hindering efficient cooling. An efficient method to mitigating power consumption entails the utilization of nonvolatile reminiscence applied sciences, akin to resistive random-access reminiscence (RRAM). Integration of selector transistors with RRAM units mitigates sneak path leakage, will increase nonlinearity, and improves the reliability of vertically stacked arrays. Nonetheless, executing core AI duties—akin to vector-matrix multiplication in neuromorphic computing—requires substantial present circulation by these transistors, which in flip results in warmth technology, diminished energy effectivity, and potential computational errors. Moreover, densely stacked layers create hotspots and limit entry to cooling interfaces. This examine presents a comparative evaluation of fashions with numerous selector transistor configurations, primarily based on energy parameters from microfabricated 3D RRAM buildings. The outcomes point out that optimally positioning the selector transistor on the reminiscence interface can scale back nanoscale warmth accumulation by as much as 11%, as verified by finite-element simulations and numerical calculations. Improved thermal administration diminished peak native temperatures from over 160 °C to under 60 °C inside 20 nanoseconds in configurations that includes 10 to 100 stacked layers.
